iBexG726x1 G.726, G.711 codec ASIC/FPGA core

Important Features

·   26K gates size

·   High performance, Support up to  2048 channels  8KHz voice coding and decoding                            simultaneously in 20 MHz clock

·   Single clock synchronous design

·   No memory required.

·   Straightforward interface for SoC applications

Function Overview

    PCM to A-law, u-law, G.726 - 40,32,24,16  kbit/s format

    A-law, u-law to G.726 - 40,32,24,16  kbit/s format

    A-law, u-law,G.726 - 40,32,24,16  kbit/s format to PCM

Deliverables

 ‧  Synthesizable verilog source code
 ‧  Verilog testbench

Interface