iBexG729x1 G.729 ASIC/FPGA encoder

Important Features

·   100K gates size (ASIC)

·   29K logic elements (Altera FPGA)

·   Single clock synchronous design

·   5.2K bytes memory per channel required.

·   Straightforward interface for SoC applications

Function Overview

    PCM to  G.729  

Deliverables

 ‧  Synthesizable verilog source code
 ‧  Verilog testbench

Interface