iBexMP3x1 MP3 decoder ASIC/FPGA Core

Important Features
 ‧ Decode all MP3 bit streams under 9 MHz Clock
 ‧ 45 K gates in logic plus 13K bytes on chip data memory, no program ROM needed
 ‧ Ten-band equalizer with 64 steps for -20 to 20 dB gain
 ‧ Thirty-two steps volume control
 ‧ Superior music quality 
 ‧ Straightforward user interface
 ‧ Hand-crafted optimized data path with complete hard-wired logic
 ‧ Fully synthesizable technology independent of verilog RTL code

Deliverables

 ‧  Synthesizable verilog source code
 ‧  Verilog testbench

Interface