iBexWADECx1 Bluetooth A2DP SBC decoder ASIC/FPGA core

The decoder can provide superior 16/32/44.1/48 KHz stereo audio decompress in real time with as little as 4 MHz operation clock. It can be used not only in the Bluetooth audio applications, but also in a wide range of audio/voice applications.

Important Features
 ‧ All A2DP decoding functions implemented at RTL level
 ‧ Gate count 22 K gates plus 1728 bytes data RAM
 ‧ Lowest power consumption(clock required 4 MHz)
 ‧ Single clock synchronous design
 ‧ Support Bluetooth A2DP SBC mono/dual/stereo/joint stereo audio decoding in 16/32/44.1/48 KHz
 ‧ Straightforward interfaces for SoC applications
 ‧ Fully synthesizable technology independent of verilog RTL code

Function Overview
 WADDECx1 takes SBC bitstream, automatically decompresses it to 16 bits PCM audio format.

iBexWADENCx1 Bluetooth A2DP SBC encoder ASIC/FPGA core.

The encoder can provide superior 16/32/44.1/48 KHz stereo audio compress in real time with as little as 4 MHz operation clock. It can be used not only in the Bluetooth audio applications, but also in a wide range of audio/voice applications.

Important Features
 ‧  All A2DP encoding functions implemented at RTL level
 ‧  Gate count 21 K gates plus 2304 bytes data RAM
 ‧  Lowest power consumption(clock required 4 MHz)
 ‧  Single clock synchronous design
 ‧  Support Bluetooth A2DP SBC mono/stereo encoding in 16/32/44.1/48 KHz
 ‧  Straightforward interfaces for SoC applications
 ‧  Fully synthesizable technology independent of verilog RTL code

Function Overview
 WADENCx1 takes 16 bits PCM bitstream, automatically generates header and compresses it into A2DP SBC format.

Deliverables

 ‧  Synthesizable verilog source code
 ‧  Verilog testbench

Interface